Conference paper
Verification of transactional memory in POWER8
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DAC 2014
Editor's note: Hardware-accelerated simulation platforms can significantly reduce the validation time. This article presents an off-platform test generation method and it compares and contrasts it against the on-platform alternative for two state-of-the-art multicore processor designs.
Allon Adir, Dave Goodman, et al.
DAC 2014
Arkadiy Morgenshtein, Alexander Fish, et al.
ISCAS 2004
Arkadiy Morgenshtein, Alexander Fish, et al.
IEEE Transactions on VLSI Systems
Ophir Friedler, Wisam Kadry, et al.
DATE 2014