Conference paperAnalysis of retention time distribution of embedded DRAM - A new mMethod to characterize across-chip threshold voltage variationW. Kong, P. Parries, et al.IEEE ITC 2008
Conference paperA 0.127 μm2 high performance 65 nm SOI based embedded DRAM for on-processor applicationsG. Wang, K. Cheng, et al.IEDM 2006
Conference paperScaling deep trench based eDRAM on SOI to 32nm and beyondG. Wang, D. Anand, et al.IEDM 2009
Conference paperFDSOI for low power CMOS (invited)Ghavam G. ShahidiIEEE International SOI Conference 2009