Error evaluation algorithm for oneshot Reed-Solomon decoder
- Yasunao Katayama
- Sumio Morioka
- 1999
- ITCOM 1999
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48 results for Yasunao Katayama
Development of a high bandwidth merged logic/DRAM multimedia chip
- W.K. Luk
- Y. Katayama
- et al.
- 1997
- ICCD 1997
Trends in semiconductor memories
- Yasunao Katayama
- 1997
- IEEE Micro
A 14-ns 4-Mb CMOS DRAM with 300-mW Active Power
- Toshiaki Kirihata
- Sang H. Dhong
- et al.
- 1992
- IEEE Journal of Solid-State Circuits
A Pulsed Sensing Scheme with a Limited BitLine Swing
- R. Scheuerlein
- Y. Katayama
- et al.
- 1992
- IEEE Journal of Solid-State Circuits
Experimental 27 ns 1 Mb CMOS high-speed DRAM
- S. Dhong
- W.H. Henkels
- et al.
- 1989
- VLSI Circuits 1989
A 22-ns 1-Mbit CMOS High-Speed DRAM with Address Multiplexing
- Nicky C.C. Lu
- Gary B. Bronner
- et al.
- 1989
- IEEE Journal of Solid-State Circuits
Scaling integration method for singular integrals and its application to BEM
- Yasunao Katayama
- Masato Koda
- 1989
- Journal of Computational Physics