Study of boron penetration through thin oxide with p+-polysilicon gate
- J.Y.-C. Sun
- C.Y. Wong
- et al.
- 1989
- VLSI Technology 1989
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90 results for Jack Y. C. Sun
Hot-carrier induced instability of 0.5 μm CMOS devices patterned using synchrotron X-ray lithography
- C.C.-H. Hsu
- L.K. Wang
- et al.
- 1989
- IRPS 1989
A 3.5-ns/77 K and 6.2-ns/300 K 64K CMOS RAM with ECL Interfaces
- Terry I. Chappell
- Stanley E. Schuster
- et al.
- 1989
- IEEE Journal of Solid-State Circuits
Doping of n+ and p+ polysilicon in a dual-gate CMOS process
- C.Y. Wong
- J.Y.-C. Sun
- et al.
- 1988
- IEDM 1988
3.5ns CMOS 64K ECL RAM at 77°K
- S.E. Schuster
- T.I. Chappell
- et al.
- 1988
- VLSI Circuits 1988
Rapid thermal processing of arsenic-implanted polysilicon on very thin oxide
- J.Y.-C. Sun
- R. Angelucci
- et al.
- 1988
- ESSDERC 1988
A high performance liquid-nitrogen CMOS SRAM technology
- J.Y.-C. Sun
- S. Klepner
- et al.
- 1988
- ESSDERC 1988
Trapping properties of very thin nitride/oxide gate insulators
- J.Y.-C. Sun
- M. Arienzo
- et al.
- 1987
- ESSDERC 1987
0.5 μm CMOS device design and characterization
- H.I. Hanafi
- M.R. Wordeman
- et al.
- 1987
- ESSDERC 1987
On the Resistivity of TiSi2: The Implication for Low-Temperature Applications
- Lia Krusin-Elbaum
- Jack Yuan-Chen Sun
- et al.
- 1987
- IEEE T-ED