Hierarchical channel router
- Michael Burstein
- Richard Pelavin
- 1988
- DAC 1988
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6 results for Michael Burstein
TIMING INFLUENCED LAYOUT DESIGN.
- Michael Burstein
- Mary N. Youssef
- 1984
- DAC 1984
HIERARCHICAL VLSI LAYOUT: SIMULTANEOUS PLACEMENT AND WIRING OF GATE ARRAYS.
- Michael Burstein
- Se June Hong
- et al.
- 1982
- VLSI 1982
Hierarchical channel router
- Michael Burstein
- Richard Pelavin
- 1984
- Computer-Aided Design
Hierarchical channel router
- Michael Burstein
- Richard Pelavin
- 1983
- Integration, the VLSI Journal
Hierarchical Wire Routing
- Michael Burstein
- Richard Pelavin
- 1983
- IEEE TCADIS