Sub-30 nm abrupt P+ junction formation with Ge preamorphization and high energy Si co-implantation
- K.L. Lee
- Ted Zabel
- et al.
- 1999
- MRS Spring Meeting 1999
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29 results for R. Viswanathan
Is selective CVD an improvement for the titanium silicide process in sub-quarter micron technology? A phase formation study using x-ray diffraction
- R.A. Roy
- Cryil Cabral Jr.
- et al.
- 1998
- MRS Spring Meeting 1998
Is selective CVD an improvement for the titanium silicide process in sub-quarter micron technology? A phase formation study using x-ray diffraction
- R.A. Roy
- Cryil Cabral Jr.
- et al.
- 1998
- MRS Spring Meeting 1998
High-performance 0.07-μm CMOS with 9.5-ps gate delay and 150 GHz fT
- Clement Wann
- Fariborz Assaderaghi
- et al.
- 1997
- IEEE Electron Device Letters
Magnetic tunnel junctions fabricated at tenth-micron dimensions by electron beam lithography
- S. Rishton
- Y. Lu
- et al.
- 1997
- Microelectronic Engineering
Ultrasonic and dip resist development processes for 50 nm device fabrication
- K.L. Lee
- J. Bucchignano
- et al.
- 1997
- Journal of Vacuum Science and Technology B: Microelectronics and Nanometer Structures
Patterning of 100 nm features using X-ray lithography
- Azalia A. Krasnoperova
- Scott Hector
- et al.
- 1997
- J. Photopolym. Sci. Tech.
X-ray lithography for ≤100 nm ground rules in complex patterns
- Scott Hector
- Victor Pol
- et al.
- 1997
- Journal of Vacuum Science and Technology B: Microelectronics and Nanometer Structures
CMOS scaling into the nanometer regime
- Yuan Taur
- Douglas A. Buchanan
- et al.
- 1997
- Proceedings of the IEEE
In situ analysis of the formation of thin TiSi2 (<50 nm) contacts in submicron CMOS structures during rapid thermal annealing
- L. Clevenger
- C. Cabral Jr.
- et al.
- 1995
- MRS Fall Meeting 1995