Enhanced performance of accumulation mode 0.5 μ m CMOS/SOI operated at 300 K and 85 K
- L.K. Wang
- J. Seliskar
- et al.
- 1991
- IEDM 1991
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A high-performance 0.5-μm BiCMOS technology with 3.3-V CMOS devices
- Eric D. Johnson
- T.B. Hook
- et al.
- 1990
- VLSI Technology 1990
0.5 μm CMOS device design and characterization
- H.I. Hanafi
- M.R. Wordeman
- et al.
- 1987
- ESSDERC 1987
0. 5 MICRON GATE CMOS TECHNOLOGY USING E-BEAM/OPTICAL MIX LITHOGRAPHY.
- L.K. Wang
- Y. Taur
- et al.
- 1985
- VLSI Technology 1985