Functional implementation techniques for CPU cache memories
- Jih-Kwon Peir
- Windsor W. Hsu
- et al.
- 1999
- IEEE TC
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12 results for Jih-Kwon Peir
Designing High-Performance Processors Using Real Address Prediction
- Kien A. Hua
- Lishing Liu
- et al.
- 1993
- IEEE TC
Minimum Distance: A Method for Partitioning Recurrences for Multiprocessors
- Jih-Kwon Peir
- Ron Cytron
- 1989
- IEEE TC
Improving multistage network performance under uniform and hot-spot traffics
- Jih-Kwon Peir
- Yann-Hang Lee
- 1990
- SPDP 1990
A high performance hybrid architecture for concurrent query execution
- Kien A. Hua
- Chiang Lee
- et al.
- 1990
- SPDP 1990
Designing 3-D optical dilation multistage interconnection networks
- Jih-Kwon Peir
- Kung-Shiuh Huang
- 1990
- Frontiers 1990
Improving cache performance with balanced tag and data paths
- Jih-Kwon Peir
- Windsor W. Hsu
- et al.
- 1996
- SIGPLAN Notices (ACM Special Interest Group on Programming Languages)
Capturing Dynamic Memory Reference Behavior with Adaptive Cache Topology
- Jih-Kwon Peir
- Yongjoon Lee
- et al.
- 2008
- EuroSys 2008
Improving cache performance with balanced tag and data paths
- Jih-Kwon Peir
- Windsor W. Hsu
- et al.
- 2008
- EuroSys 2008
Improving cache performance with Full-Map Block Directory
- Jih-Kwon Peir
- Windsor W. Hsu
- et al.
- 2000
- Journal of Systems Architecture