Integration and optimization of embedded-SiGe, compressive and tensile stressed liner films, and stress memorization in advanced SOI CMOS technologies
- M. Horstmann
- A. Wei
- et al.
- 2005
- IEDM 2005
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6 results for H.J. Engelmann
High performance 65 nm SOI technology with enhanced transistor strain and advanced-low-K BEOL
- W.-H. Lee
- A. Waite
- et al.
- 2005
- IEDM 2005
New failure mechanism during high temperature storage testing and its application on SIV risk evaluation
- O. Aubel
- W. Yao
- et al.
- 2009
- IIRW 2009
Implementation of robust nickel alloy salicide process for high-performance 65nm SOI CMOS manufacturing
- Jay Strane
- David Brown
- et al.
- 2007
- VLSI-TSA 2007
The evolution of barrier properties during reliability testing of Cu interconnects
- M.A. Meyer
- O. Aubel
- et al.
- 2008
- International Workshop on Stress-Induced Phenomena in Metallization 2008
Extensive investigations of temperature influence on barrier integrity during reliability testing
- O. Aubel
- M.A. Meyer
- et al.
- 2008
- Microelectronic Engineering