A SiCOH BEOL interconnect technology for high density and high performance 65 nm CMOS applications
- Matthew Angyal
- Jason Gill
- et al.
- 2005
- AMC 2005
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27 results for Thomas Ivers
BEOL process integration with Cu/SiCOH (k=2.8) low-k interconnects at 65nm groundrules
- S. Lane
- M. Fukasawa
- et al.
- 2005
- AMC 2005
BEOL process integration with Cu/SiCOH (k=2.8) low-k interconnects at 65 nm groundrules
- M. Fukasawa
- S. Lane
- et al.
- 2005
- IITC 2005
High performance 65 nm SOI technology with dual stress liner and low capacitance SRAM cell
- E. Leobandung
- H. Nayakama
- et al.
- 2005
- VLSI Technology 2005
Low-k/copper integration scheme suitable for ULSI manufacturing from 90nm to 45nm nodes
- T. Nogami
- S. Lane
- et al.
- 2005
- Optics East 2005
Lower-k SiCOH integration for 65 nm ground rules
- T. Nogami
- S. Lane
- et al.
- 2005
- VMIC 2005
Electrical and reliability evaluation of Cu/Low-k integration: Exploration of PVD barrier/seed and CVD SiC(N,H) cap depositions
- C.-C. Yang
- D. Edelstein
- et al.
- 2004
- ADMETA 2004
Reliability, yield, and performance of a 90 nm SOI/Cu/SiCOH technology
- D. Edelstein
- C.R. Davis
- et al.
- 2004
- IITC 2004
Chip-to-Package Interaction for a 90 nm Cu / PECVD Low-k technology
- W. Landers
- D. Edelstein
- et al.
- 2004
- IITC 2004
Optimization of SiCOH dielectrics for integration in a 90 nm CMOS technology
- A. Grill
- D. Edelstein
- et al.
- 2004
- IITC 2004