High performance 0.13 μm SOI CMOS technology with Cu interconnects and low-k BEOL dielectric
- P. Smeys
- V. McGahay
- et al.
- 2000
- VLSI Technology 2000
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PD/SOI SRAM performance in presence of gate-to-body tunneling current
- Rajiv V. Joshi
- Ching-Te Chuang
- et al.
- 2003
- IEEE Transactions on VLSI Systems