Integration and optimization of embedded-SiGe, compressive and tensile stressed liner films, and stress memorization in advanced SOI CMOS technologies
- M. Horstmann
- A. Wei
- et al.
- 2005
- IEDM 2005
Publications
Date
Featured collections
Popular topics
22 results for Huajie Chen
High performance 65 nm SOI technology with enhanced transistor strain and advanced-low-K BEOL
- W.-H. Lee
- A. Waite
- et al.
- 2005
- IEDM 2005
Performance enhancement on sub-70 nm strained silicon SOI MOSFETS on ultra-thin thermally mixed strained silicon/SiGe on insulator(TM-SGOI) substrate with raised S/D
- B.H. Lee
- A.C. Mocuta
- et al.
- 2002
- IEDM 2002
Self-aligned SiGe NPN transistors with 285 GHz f MAX and 207 GHz f T in a manufacturable technology
- B. Jagannathan
- M. Khater
- et al.
- 2002
- IEEE Electron Device Letters
Implementation of robust nickel alloy salicide process for high-performance 65nm SOI CMOS manufacturing
- Jay Strane
- David Brown
- et al.
- 2007
- VLSI-TSA 2007
Integration of local stress techniques with strained-Si directly on insulator (SSDOI) substrates
- Haizhou Yin
- Z. Ren
- et al.
- 2006
- VLSI Technology 2006
Investigation of CMOS devices with embedded SiGe source/drain on hybrid orientation substrates
- Qiqing Ouyang
- Min Yang
- et al.
- 2005
- VLSI Technology 2005
Retardation of arsenic diffusion in silicon-germanium by co-implantation
- Omer Dokumaci
- Paul Ronsheim
- et al.
- 2004
- ECS Meeting 2004
A hydrogen pre-bake process for Si epitaxy on sige surface
- H. Chen
- S.W. Bedell
- et al.
- 2004
- ECS Meeting 2004
Influence of He implantation conditions on strain relaxation and threading dislocation density in Si0.8Ge0.2 virtual substrates
- J. Cai
- P.M. Mooney
- et al.
- 2004
- MRS Proceedings 2004