65nm CMOS technology for low power applications
- A. Steegen
- R. Mo
- et al.
- 2005
- IEDM 2005
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4 results for C. Baiocco
High performance and low power transistors integrated in 65nm bulk CMOS technology
- Z. Luo
- A. Steegen
- et al.
- 2004
- IEDM 2004
A cost effective 32nm high-K/metal gate CMOS technology for low power applications with single-metal/gate-first process
- X. Chen
- S. Samavedam
- et al.
- 2008
- VLSI Technology 2008
Stress proximity technique for performance improvement with dual stress liner at 45nm technology and beyond
- X. Chen
- S. Fang
- et al.
- 2006
- VLSI Technology 2006