All-digital dynamic self-detection and self-compensation of static phase offsets in charge-pump PLLs
- Liu Yong
- Woogeun Rhee
- et al.
- 2007
- ISSCC 2007
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14 results for Woogeun Rhee
A 10Gb/s 5-tap-DFE/4-tap-FFE transceiver in 90nm CMOS
- M. Meghelli
- S. Rylov
- et al.
- 2006
- ISSCC 2006
A 6.4Gb/s CMOS SerDes core with feedforward and decision-feedback equalization
- M. Sorna
- T. Beukema
- et al.
- 2005
- ISSCC 2005
A 6.4Gb/s CMOS SerDes core with feedforward and decision-feedback equalization
- M. Sorna
- T. Beukema
- et al.
- 2005
- ISSCC 2005
A uniform bandwidth PLL using a continuously tunable single-input dual-path LC VCO for 5Gb/s PCI express Gen2 application
- Woogeun Rhee
- Herschel Ainspan
- et al.
- 2007
- A-SSCC 2007
An ultra compact differentially tuned 6 GHz CMOS LC VCO with dynamic common-mode feedback
- Babak Soltanian
- Herschel Ainspan
- et al.
- 2006
- CICC 2006
Experimental analysis of the effect of substrate noise on PLL performance
- Keith A. Jenkins
- Woogeun Rhee
- et al.
- 2006
- SiRF 2006
A 10-Gb/s CMOS clock and data recovery circuit using a secondary delay-locked loop
- Woogeun Rhee
- Herschel Ainspan
- et al.
- 2003
- CICC 2003
Experimental analysis of substrate noise effect on PLL performance
- Woogeun Rhee
- Keith A. Jenkins
- et al.
- 2008
- IEEE TCAS-II
An ultra-compact differentially tuned 6-GHz CMOS LC-VCO with dynamic common-mode feedback
- Babak Soltanian
- Herschel Ainspan
- et al.
- 2007
- IEEE Journal of Solid-State Circuits