Parasitic Resistance Reduction Strategies for Advanced CMOS FinFETs beyond 7nmHeng WuOleg Gluschenkovet al.2018IEDM 2018
Self-Allancd Gate Contact (SAGC) for CMOS technology scaling beyond 7nmRuilong XieChanro Parket al.2019VLSI Technology 2019
Annealing and impurity effects in co thin films for MOL Contact and BEOL metallizationJames KellyVimal Kamineniet al.2018JES