2nd Generation dual-channel optimization with cSiGe for 22nm HP technology and beyond
- C. Ortolland
- Daniel Jaeger
- et al.
- 2013
- IEDM 2013
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22 results for Kai Zhao
Bias temperature instability in high-κ/metal gate transistors - Gate stack scaling trends
- Siddarth Krishnan
- Vijay Narayanan
- et al.
- 2012
- IRPS 2012
Detailed study of fast transient relaxation of Vt instability in HKMG nFETs
- K. Zhao
- James Stathis
- et al.
- 2012
- IRPS 2012
Advanced modeling and optimization of high performance 32nm HKMG SOI CMOS for RF/analog SoC applications
- Sungjae Lee
- J. Johnson
- et al.
- 2012
- VLSI Technology 2012
Fundamental aspects of HfO 2-based high-k metal gate stack reliability and implications on t inv-scaling
- E. Cartier
- Andreas Kerber
- et al.
- 2011
- IEDM 2011
PBTI/NBTI monitoring ring oscillator circuits with on-chip Vt characterization and high frequency AC stress capability
- Jae-Joon Kim
- Rahul M. Rao
- et al.
- 2011
- VLSI Circuits 2011
A robust reliability methodology for accurately predicting Bias Temperature Instability induced circuit performance degradation in HKMG CMOS
- D.P. Ioannou
- K. Zhao
- et al.
- 2011
- IRPS 2011
Bias Temperature Instability model for digital circuits - Predicting instantaneous FET response
- Aditya Bansal
- Kai Zhao
- et al.
- 2011
- IRPS 2011
PBTI under dynamic stress: From a single defect point of view
- K. Zhao
- J.H. Stathis
- et al.
- 2011
- IRPS 2011
PBTI relaxation dynamics after ac VS. DC stress in high-K/metal gate stacks
- K. Zhao
- J.H. Stathis
- et al.
- 2010
- IRPS 2010