A critical analysis of sampling-based reconstruction methodology for dielectric breakdown systems (BEOL/MOL/FEOL)Ernest Y. WuJames Stathiset al.2015IRPS 2015
Detailed study of fast transient relaxation of Vt instability in HKMG nFETsK. ZhaoJames Stathiset al.2012IRPS 2012
Bias temperature instability in high-κ/metal gate transistors - Gate stack scaling trendsSiddarth KrishnanVijay Narayananet al.2012IRPS 2012
Advanced modeling and optimization of high performance 32nm HKMG SOI CMOS for RF/analog SoC applicationsSungjae LeeJ. Johnsonet al.2012VLSI Technology 2012
PBTI/NBTI monitoring ring oscillator circuits with on-chip Vt characterization and high frequency AC stress capabilityJae-Joon KimRahul M. Raoet al.2011VLSI Circuits 2011
A robust reliability methodology for accurately predicting Bias Temperature Instability induced circuit performance degradation in HKMG CMOSD.P. IoannouK. Zhaoet al.2011IRPS 2011
Bias Temperature Instability model for digital circuits - Predicting instantaneous FET responseAditya BansalKai Zhaoet al.2011IRPS 2011
PBTI relaxation dynamics after ac VS. DC stress in high-K/metal gate stacksK. ZhaoJ.H. Stathiset al.2010IRPS 2010
Impact of instrumental current scatter on fast Bias Temperature Instability testingA. KerberK. Zhaoet al.2009IIRW 2009