Fully subtractive Ru Topvia interconnects with minimum 9 nm-space airgap for RC performance and reliability enhancement as post-Cu interconnectsKoichi MotoyamaJaemyung Choiet al.2024IEDM 2024
Backside power distribution for nanosheet technologies beyond 2nmRuilong XieWonhyuk Honget al.2024VLSI Technology and Circuits 2024
EUV Double Patterning Solution for Subtractive Metal Patterning at 18nm PitchChris PennyKoichi Motoyamaet al.2024SPIE Advanced Lithography + Patterning 2024