Chip-level power-performance optimization through thermally-driven across-chip variation (ACV) reduction
- X. Yu
- Oleg Gluschenkov
- et al.
- 2011
- IEDM 2011
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8 results for D. Lea
High performance 45-nm SOI technology with enhanced strain, porous low-k BEOL, and immersion lithography
- S. Narasimha
- K. Onishi
- et al.
- 2006
- IEDM 2006
Failure isolation in ring oscillator circuit and defect detection in CMOS technology research
- Victor Chan
- M. Bergendahl
- et al.
- 2019
- ASMC 2019
Ring oscillator yield learning methodologies for CMOS technology research
- Victor Chan
- D. Lea
- et al.
- 2018
- ASMC 2018
Oxygen vacancy traps in Hi-K/Metal gate technologies and their potential for embedded memory applications
- C. Kothandaraman
- X. Chen
- et al.
- 2015
- IRPS 2015
Hardware-corroborated variability-aware SRAM methodology
- Rajiv Joshi
- Rouwaida Kanj
- et al.
- 2013
- VLSID 2013
SRAM Cell Design for Stability Methodology
- Clement Wann
- Robert Wong
- et al.
- 2005
- VLSI Technology 2005
Yield learning methodologies and failure isolation in ring oscillator circuit for CMOS technology research
- Victor Chan
- Kangguo Cheng
- et al.
- 2019
- IEEE Trans Semicond Manuf