L.K. Wang, A. Acovic, et al.
MRS Spring Meeting 1993
We report a detailed study of the impact of systematic across-chip variation (ACV) on chip level power-performance. We propose a metric to capture impact of ACV on chip-level leakage quantitatively. Product power-performance can be optimized by minimizing systematic ACV. Thermally-driven ACV was identified as a major mechanism in 32nm SOI technology. An optimized thermal anneal process was used to suppress ACV significantly, leading to a dramatic benefit in leakage power-performance trade-off. © 2011 IEEE.
L.K. Wang, A. Acovic, et al.
MRS Spring Meeting 1993
Shu-Jen Han, Alberto Valdes-Garcia, et al.
IEDM 2011
Sharee J. McNab, Richard J. Blaikie
Materials Research Society Symposium - Proceedings
M. Hamaguchi, Deleep R. Nair, et al.
IEDM 2011