Optimized durable commitlog for apache Cassandra using CAPI-flash
- Bedri Sendir
- Madhusudhan Govindaraju
- et al.
- 2016
- CLOUD 2016
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38 results for Peter Hofstee
Auto-tuning Spark Big Data Workloads on POWER8: Prediction-Based Dynamic SMT Threading
- Zhen Jia
- Chao Xue
- et al.
- 2016
- PACT 2016
PATer: A hardware prefetching automatic tuner on IBM POWER8 processor
- Minghua Li
- Guancheng Chen
- et al.
- 2016
- IEEE Computer Architecture Letters
Feature detection for image analytics via FPGA acceleration
- H.-Y. Chang
- Iris Hui Ru Jiang
- et al.
- 2015
- IBM J. Res. Dev
Giving Text Analytics a Boost
- Raphael Polig
- Kubilay Atasu
- et al.
- 2014
- IEEE Micro
Hardware-accelerated text analytics
- Raphael Polig
- Kubilay Atasu
- et al.
- 2014
- HCS 2014
Microarchitecture and implementation of the synergistic processor in 65-nm and 90-nm SOI
- Brian Flachs
- Shigehiro Asano
- et al.
- 2007
- IBM J. Res. Dev
Key features of the design methodology enabling a multi-core SoC implementation of a first-generation CELL processor
- Dac Pham
- Hans-Werner Anderson
- et al.
- 2006
- ASP-DAC 2006
Synergistic processing in cell's multicore architecture
- Michael Gschwind
- H. Peter Hofstee
- et al.
- 2006
- IEEE Micro
Overview of the architecture, circuit design, and physical implementation of a first-generation cell processor
- D.C. Pham
- T. Aipperspach
- et al.
- 2006
- IEEE Journal of Solid-State Circuits