Reliability qualification of CoSI2 electrical fuse for 90NM technology
- C. Tian
- B. Park
- et al.
- 2006
- IRPS 2006
Publications
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124 results for Subramanian S. Iyer
Process induced stress for CMOS performance improvement
- S. Fang
- S.S. Tan
- et al.
- 2006
- ICSICT 2006
Trimming of hard-masks by gaseous chemical oxide removal (COR) for sub-10nm gates/fins, for gate length control and for embedded logic
- Wesley C. Natzle
- David Horak
- et al.
- 2004
- ASMC 2004
Novel capacitor-less high density low power vertical memory
- S. Tiwari
- H.I. Hanafi
- et al.
- 1994
- DRC 1994
An ultra-low thermal-budget SiGe-base bipolar technology
- J.N. Burghartz
- D.A. Grützmacher
- et al.
- 1993
- VLSI Technology 1993
Electroluminescence and Photoluminescence from Microporous Silicon p-n Junctions
- V.P. Kesan
- E. Bassous
- et al.
- 1993
- Journal of Vacuum Science and Technology A: Vacuum, Surfaces and Films
SiCGe Ternarv Allovs - Extending Si-based heterostructures
- Subramanian S. Iyer
- K. Eberl
- et al.
- 1992
- ESSDERC 1992
SiGe heterojunctions: Devices and applications
- Maurizio Arienzo
- James H. Comfort
- et al.
- 1992
- ESSDERC 1992
Strain relaxation in GeSi layers with uniform and graded composition
- S.C. Jain
- P. Balk
- et al.
- 1991
- ESSDERC 1991
Growth and applications of Si1-xGex alloys in a Si-based technology
- Subramanian S. Iyer
- 1991
- SSDM 1991