Ultralow-voltage minimum-energy CMOS
- Scott Hanson
- Bo Zhai
- et al.
- 2006
- IBM J. Res. Dev
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48 results for E. Nowak
Modeling of variation in submicrometer CMOS ULSI technologies
- Scott K. Springer
- Sungjae Lee
- et al.
- 2006
- IEEE Transactions on Electron Devices
High performance 65 nm SOI technology with dual stress liner and low capacitance SRAM cell
- E. Leobandung
- H. Nayakama
- et al.
- 2005
- VLSI Technology 2005
Assembly technology for three dimensional integrated circuits
- A. Topol
- D.C. La Tulipe
- et al.
- 2005
- VMIC 2005
Status and direction of communication technologies - SiGe BiCMOS and RFCMOS
- Alvin J. Joseph
- David L. Harame
- et al.
- 2005
- Proceedings of the IEEE
FinFET SRAM for high-performance low-power applications
- Rajiv V. Joshi
- Richard Q. Williams
- et al.
- 2004
- ESSDERC/ESSCIRC 2004
A Simplified Hybrid Orientation Technology (SHOT) for high performance CMOS
- B. Doris
- Y. Zhang
- et al.
- 2004
- VLSI Technology 2004
Scaling planar silicon devices
- Ching-Te Chuang
- Kerry Bernstein
- et al.
- 2004
- IEEE Circuits and Devices Magazine
Turning silicon on its edge
- Edward J. Nowak
- Ingo Aller
- et al.
- 2004
- IEEE Circuits and Devices Magazine
Scaling beyond the 65 nm node with FinFET-DGCMOS
- E. Nowak
- T. Ludwig
- et al.
- 2003
- CICC 2003