Device scaling limits of Si MOSFETs and their application dependencies
- David J. Frank
- Robert H. Dennard
- et al.
- 2001
- Proceedings of the IEEE
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48 results for E. Nowak
RF potential of a 0.18-μm CMOS logic device technology
- Joachim N. Burghartz
- Michael Hargrove
- et al.
- 2000
- IEEE Transactions on Electron Devices
0.18 μm high-performance logic technology
- S.W. Crowder
- S. Greco
- et al.
- 1999
- VLSI Technology 1999
Sub-60 nm physical gate length SOI CMOS
- I.Y. Yang
- K. Chen
- et al.
- 1999
- IEDM 1999
High-performance sub-0.08 μm CMOS with dual gate oxide and 9.7 ps inverter delay
- M. Hargrove
- S.W. Crowder
- et al.
- 1998
- IEDM 1998
CMOS devices below 0.1 μm: How high will performance go?
- Yuan Taut
- E. Nowak
- 1997
- IEDM 1997
High-performance 0.08 μm CMOS
- L. Su
- S. Subbanna
- et al.
- 1996
- VLSI Technology 1996
CMOS scaling into the 21st century: 0.1 μm and beyond
- Y. Taur
- Y. Mii
- et al.
- 1995
- IBM J. Res. Dev