PECVD Low-k (∼2.7) dielectric SiCOH film development and integration for 65 nm CMOS devices
- K. Ida
- S. Nguyen
- et al.
- 2005
- AMC 2005
Publications
120 results for Stephan A. Cohen
Low-k/copper integration scheme suitable for ULSI manufacturing from 90nm to 45nm nodes
- T. Nogami
- S. Lane
- et al.
- 2005
- Optics East 2005
Lower-k SiCOH integration for 65 nm ground rules
- T. Nogami
- S. Lane
- et al.
- 2005
- VMIC 2005
Optimization of high κ gate stacks with poly-Si, FUSI and metal electrodes
- R. Jammy
- V. Narayanan
- et al.
- 2005
- ISTC 2005
Poly-Si/high-k gate stacks with near-ideal threshold voltage and mobility
- M.M. Frank
- V.K. Paruchuri
- et al.
- 2005
- VLSI-TSA 2005
Advanced gate stacks with fully silicided (FUSI) gates and high-κ dielectrics: Enhanced performance at reduced gate leakage
- E. Gusev
- C. Cabral Jr.
- et al.
- 2004
- IEDM 2004
Reliability, yield, and performance of a 90 nm SOI/Cu/SiCOH technology
- D. Edelstein
- C.R. Davis
- et al.
- 2004
- IITC 2004
Optimization of SiCOH dielectrics for integration in a 90 nm CMOS technology
- A. Grill
- D. Edelstein
- et al.
- 2004
- IITC 2004
90 nm SiCOH technology in 300 mm manufacturing
- L. Clevenger
- M. Yoon
- et al.
- 2004
- ADMETA 2004
Systematic study of pFET Vt with Hf-based gate stacks with poly-Si and FUSI gates
- E. Cartier
- V. Narayanan
- et al.
- 2004
- VLSI Technology 2004