A Switched-Capacitor Integer Compute Unit with Decoupled Storage and Arithmetic for Cloud AI Inference in 5nm CMOS
- Ankur Agrawal
- Monodeep Kar
- et al.
- 2023
- VLSI Technology 2023
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7 results for S. Munetoh
WS-attestation: Efficient and fine-grained remote attestation on web services
- Sachiko Yoshihama
- Tim Ebringer
- et al.
- 2005
- ICWS 2005
Universal optical multi-drop bus for heterogeneous memory architecture
- Atsuya Okazaki
- Yasunao Katayama
- et al.
- 2011
- CF 2011
Destructive-read Random Access Memory System Buffered with Destructive-read Memory Cache for SoC Applications
- Brian L. Ji
- Seiji Munetoh
- et al.
- 2003
- VLSI Circuits 2003
Development of a high bandwidth merged logic/DRAM multimedia chip
- W.K. Luk
- Y. Katayama
- et al.
- 1997
- ICCD 1997
A compact rijndael hardware architecture with S-Box optimization
- Akashi Satoh
- Sumio Morioka
- et al.
- 2001
- Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
Crypto anchors
- Venkat Balagurusamy
- Cyril Cabral
- et al.
- 2019
- IBM J. Res. Dev