A universal hardware-driven PVT and layout-aware predictive failure analytics for SRAM
- Rajiv V. Joshi
- Sudesh Saroop
- et al.
- 2016
- IEEE Transactions on VLSI Systems
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Super fast physics-based methodology for accurate memory yield prediction
- Rajiv V. Joshi
- Keunwoo Kim
- et al.
- 2015
- IEEE Transactions on VLSI Systems
A novel self-reference technique for STT-RAM read and write reliability enhancement
- Enes Eken
- Yaojun Zhang
- et al.
- 2014
- IEEE Transactions on Magnetics
Novel 4 GHz interleaved SRAM cells with asymmetrical precharge in 45 nm PDSOI technology
- Rajiv V. Joshi
- Rouwaida Kanj
- et al.
- 2014
- IEEE Trans Semicond Manuf
3-D-TCAD-based parasitic capacitance extraction for emerging multigate devices and circuits
- Ajay N. Bhoj
- Rajiv V. Joshi
- et al.
- 2013
- IEEE Transactions on VLSI Systems
Efficient methodologies for 3-D TCAD modeling of emerging devices and circuits
- Ajay N. Bhoj
- Rajiv V. Joshi
- et al.
- 2013
- IEEE TCADIS
A novel column-decoupled 8T cell for low-power differential and domino-based SRAM design
- Rajiv V. Joshi
- Rouwaida Kanj
- et al.
- 2011
- IEEE Transactions on VLSI Systems
The dawn of predictive chip yield design: Along and beyond the memory lane
- Rajiv Joshi
- Rouwaida Kanj
- et al.
- 2010
- IEEE Design and Test of Computers
Design of sub-90 nm low-power and variation tolerant PD/SOI SRAM cell based on dynamic stability metrics
- Rajiv V. Joshi
- Saibal Mukhopadhyay
- et al.
- 2009
- IEEE Journal of Solid-State Circuits
Root-finding methods for assessing SRAM stability in the presence of random dopant fluctuations
- Rouwaida Kanj
- Zhuo Li
- et al.
- 2009
- IEEE Trans Semicond Manuf