NVM neuromorphic core with 64k-cell (256-by-256) phase change memory synaptic array with on-chip neuron circuits for continuous in-situ learning
- Sangbum Kim
- Masatoshi Ishii
- et al.
- 2015
- IEDM 2015
Publications
Date
Featured collections
Popular topics
3 results for T. Perri
A no-verification Multi-Level-Cell (MLC) operation in Cross-Point OTS-PCM
- Nanbo Gong
- W. Chien
- et al.
- 2020
- VLSI Technology 2020
A Double-Data-Rate 2 (DDR2) Interface Phase-Change Memory with 533MB/s Read-Write Data Rate and 37.5ns Access Latency for Memory-Type Storage Class Memory Applications
- H. Lung
- C. Miller
- et al.
- 2016
- IMW 2016