Design of Analog-AI Hardware Accelerators for Transformer-based Language Models (Invited)
- Geoffrey Burr
- Sidney Tsai
- et al.
- 2023
- IEDM 2023
Bio
Masatoshi Ishii is a Research Scientist at IBM Research -Tokyo. He joined IBM in 1998, where he has been engaged in broad electrical engineering fields including full-custom SRAM circuit design, HDL digital circuit design, chip evaluation using FPGAs, wafer testing, signal and power integrity analysis, and printed circuit board design. His research interests include architectures and circuits with emerging memory technologies and the design of energy efficient architectures.
- ORCID: 0000-0003-0794-7232
- Google Scholar: zQqKuIEAAAAJ
Publications
An analog-AI chip for energy-efficient speech recognition and transcription
- S. Ambrogio
- Pritish Narayanan
- et al.
- 2023
- Nature
Phase Change Memory-based Hardware Accelerators for Deep Neural Networks
- Geoffrey Burr
- Pritish Narayanan
- et al.
- 2023
- VLSI Technology 2023
Architectures and Circuits for Analog-memory-based Hardware Accelerators for Deep Neural Networks
- Sidney Tsai
- Pritish Narayanan
- et al.
- 2023
- ISCAS 2023
Analog In-Memory Computing for Deep Neural Network Acceleration
- Andrea Fasoli
- Geoffrey Burr
- et al.
- 2023
- MRS Spring Meeting 2023
Analog-AI: Hardware Acceleration for Deep Neural Network Inference
- Geoffrey Burr
- Sidney Tsai
- et al.
- 2023
- NeuMatDeCaS 2023
A Heterogeneous and Programmable Compute-In-Memory Accelerator Architecture for Analog-AI Using Dense 2-D Mesh
- Shubham Jain
- Hsinyu Tsai
- et al.
- 2023
- IEEE Transactions on VLSI Systems
Impact of PCM noise on the Spiking Restricted Boltzmann Machine via On-Chip Trainable PCM synapses
- Uicheol Shin
- Masatoshi Ishii
- et al.
- 2022
- MRS Fall Meeting 2022
Analog-memory-based 14nm Hardware Accelerator for Dense Deep Neural Networks including Transformers
- Atsuya Okazaki
- Pritish Narayanan
- et al.
- 2022
- ISCAS 2022
Fully On-Chip MAC at 14 nm Enabled by Accurate Row-Wise Programming of PCM-Based Weights and Parallel Vector-Transport in Duration-Format
- Pritish Narayanan
- Stefano Ambrogio
- et al.
- 2021
- IEEE T-ED
Patents
- US
- 12124946
- GB
- 2616393
- CN
- ZL201980008114.1
- JP
- 7413367
- US
- 11823740
- US
- 11763139
- US
- 11741353
- JP
- 7228320
- GB
- 2583302
- GB
- 2593081
Top collaborators
AO
Atsuya Okazaki
Senior Research Scientist
ST
Sidney Tsai
Manager, PRSM, AI Hardware and Cloud/AI for EDA
AN
Akiyo Nomura
Staff Research Scientist
VN
Vijay Narayanan
IBM Fellow & Strategist, Physics of AI. Senior Manager, PCM and AI Materials