Efficient AI System Design with Cross-Layer Approximate Computing
- Swagath Venkataramani
- Xiao Sun
- et al.
- 2020
- Proceedings of the IEEE
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19 results for George Gristede
A 3.0 TFLOPS 0.62V Scalable Processor Core for High Compute Utilization AI Training and Inference
- Jinwook Oh
- Sae Kyu Lee
- et al.
- 2020
- VLSI Circuits 2020
A Scalable Multi-TeraOPS Core for AI Training and Inference
- Sunil Shukla
- Bruce Fleischer
- et al.
- 2018
- IEEE SSC-L
A Scalable Multi-TeraOPS Deep Learning Processor Core for AI Trainina and Inference
- Bruce Fleischer
- Sunil Shukla
- et al.
- 2018
- VLSI Circuits 2018
A synthesis-parameter tuning system for autonomous design-space exploration
- Matt Ziegler
- Hung-Yi Liu
- et al.
- 2016
- DATE 2016
A scalable black-box optimization system for auto-tuning VLSI synthesis programs
- Matt Ziegler
- Hung-Yi Liu
- et al.
- 2016
- RES4ANT 2016
POWER8 design methodology innovations for improving productivity and reducing power
- 2014
- CICC 2014
Power reduction by aggressive synthesis design space exploration
- Matthew M. Ziegler
- George D. Gristede
- et al.
- 2013
- ISLPED 2013
The opportunity cost of low power design: A case study in circuit tuning
- Matthew M. Ziegler
- Victor V. Zyuban
- et al.
- 2009
- ISLPED 2009
Characterization of logic circuit techniques and optimization for high-leakage CMOS technologies
- Phillip Chin
- Charles A. Zukowski
- et al.
- 2005
- Integration, the VLSI Journal