Advanced Multi-Vt Enabled by Selective Layer Reductions for 2nm Nanosheet Technology and Beyond
- Ruqiang Bao
- Yusuke Oniki
- et al.
- 2024
- IEDM 2024
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7 results for Juntao Li
Monolithic Stacked FET with Stepped Channels for Future Logic Technologies
- Chen Zhang
- Seungmin Song
- et al.
- 2024
- IEDM 2024
Backside power distribution for nanosheet technologies beyond 2nm
- Ruilong Xie
- Wonhyuk Hong
- et al.
- 2024
- VLSI Technology and Circuits 2024
Hardware Based Performance Assessment of Vertical-Transport Nanosheet Technology
- Gen Tsutsui
- Seunghyun Song
- et al.
- 2022
- IEDM 2022
Optimization of Interfacial PCM Layers to Enable High Resistance Doped PCM in Mushroom Cell Devices for Analog Computing
- Kevin Brew
- Injo Ok
- et al.
- 2022
- MRS Fall Meeting 2022
Optimization of Projected Phase Change Memory for Application in Analog Neuromorphic Computing
- Ning Li
- Kevin Brew
- et al.
- 2021
- MRS Fall Meeting 2021
Epi Source/Drain Damage Mitigation with Inner Spacer and Buffer Optimization in Stacked Nanosheet Gate-All-Around Transistors
- Curtis Durfee
- Ivo Otto
- et al.
- 2023
- SSDM 2023