Weichao Mao, Haoran Qiu, et al.
NeurIPS 2023
Vertical-transport FET (VTFET) has its advantage on area scaling, which enables to scale logic area beyond sub-45nm contacted gate pitch (CGP). This paper focuses on VTFET performance assessment. 1.2x effective capacitance contrasting to technology target is demonstrated based on 40CGP VTFET ring oscillator. 90% DC performance is demonstrated as well.
Weichao Mao, Haoran Qiu, et al.
NeurIPS 2023
Yue Zhu, Chen Wang, et al.
MASCOTS 2024
Haoran Qiu, Weichao Mao, et al.
USENIX ATC 2023
Apoorve Mohan, Matthew Sheard
NVIDIA GTC 2022