Demonstration of Nanosecond Operation in Stochastic Magnetic Tunnel Junctions
- Christopher Safranski
- Jan Kaiser
- et al.
- 2021
- Nano Letters
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53 results for Pouya Hashemi
Demonstration of narrow switching distributions in STT-MRAM arrays for LLC applications at 1x nm node
- E. R.J. Edwards
- Guohan Hu
- et al.
- 2020
- IEDM 2020
Spin-transfer torque MRAM with reliable 2 ns writing for last level cache applications
- Guohan Hu
- D. Kim
- et al.
- 2019
- IEDM 2019
High Performance InGaAs Gate-All-Around Nanosheet FET on Si Using Template Assisted Selective Epitaxy
- S. Lee
- Cheng-Wei Cheng
- et al.
- 2018
- IEDM 2018
Toward High Performance SiGe Channel CMOS: Design of High Electron Mobility in SiGe nFinFETs Outperforming Si
- Choonghyun Lee
- Richard G. Southwick
- et al.
- 2018
- IEDM 2018
Bias dependent conductance in CoFeB-MgO-CoFeB magnetic tunnel junctions as an indicator for electrode magnetic condition at barrier interfaces
- Jonathan Z. Sun
- Philip Trouilloud
- et al.
- 2019
- AIP Advances
Reliable 5 ns writing of spin-transfer torque MRAM
- Guohan Hu
- J. J. Nowak
- et al.
- 2019
- IEEE Magnetics Letters
Advanced replacement high-K/metal gate stack engineering for high-performance strained silicon-germanium FinFETs with high Ge content
- Pouya Hashemi
- Takashi Ando
- et al.
- 2018
- AiMES - ECS - SMEQ 2018
A study of process-related electrical defects in SOI lateral bipolar transistors fabricated by ion implantation
- Jeng-Bang Yau
- Jin Cai
- et al.
- 2018
- Journal of Applied Physics
First demonstration of symmetric lateral NPN transistors on SOI featuring epitaxially-grown emitter/collector regions
- Pouya Hashemi
- Jeng-Bang Yau
- et al.
- 2017
- S3S 2017