Characterization of stacked die using die-to-wafer integration for high yield and throughputK. SakumaP. Andryet al.2008ECTC 2008
300-Gb/s, 24-channel full-duplex, 850-nm, cmos-based optical transceiversC.L. SchowF.E. Doanyet al.2008OFC/NFOEC 2008
3D chip-stacking technology with through-silicon vias and low-volume lead free interconnectionsKatsuyuki SakumaPaul S. Andryet al.2008IBM J. Res. Dev
Fabrication and characterization of robust through-silicon vias for silicon-carrier applicationsPaul S. AndryCornelia K. Tsanget al.2008IBM J. Res. Dev
High-efficiency 60 GHz antenna fabricated using low-cost silicon micromachining techniquesN. HoivikD. Liuet al.2007APS 2007
3D chip stacking technology with low-volume lead-free interconnectionsK. SakumaP. Andryet al.2007ECTC 2007
Assembly, characterization, and reworkability of Pb-free ultra-fine pitch C4s for system-on-packageB. DangS.L. Wrightet al.2007ECTC 2007