Plasma induced dielectric modification: Etching challenges for 65nm and beyond technology nodes
- N. Fuller
- M.A. Worsley
- et al.
- 2005
- ISTC 2005
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28 results for Catherine Labelle
Low-k/copper integration scheme suitable for ULSI manufacturing from 90nm to 45nm nodes
- T. Nogami
- S. Lane
- et al.
- 2005
- Optics East 2005
Lower-k SiCOH integration for 65 nm ground rules
- T. Nogami
- S. Lane
- et al.
- 2005
- VMIC 2005
Ash-induced modification of porous and dense SiCOH inter-level-dielectric (ILD) materials during damascene plasma processing
- T. Dalton
- N. Fuller
- et al.
- 2004
- IITC 2004
CMP Challenges for Advanced Technology Nodes
- John H Zhang
- Haigou Huang
- et al.
- 2017
- MRS Advances
Impact of HF-based cleaning solutions on via resistance for sub-10 nm BEOL structures
- B. Peethala
- F. Mont
- et al.
- 2016
- Microelectronic Engineering
Competitive and cost effective copper/low-k interconnect (BEOL) for 28 nm CMOS technologies
- R. Augur
- C. Child
- et al.
- 2012
- Microelectronic Engineering
Plasma ash processing solutions for advanced interconnect technology
- N. Fuller
- M.A. Worsley
- et al.
- 2008
- Thin Solid Films