A 5.2GHz microprocessor chip for the IBM zEnterprise™ system
- James Warnock
- Y.-H. Chan
- et al.
- 2011
- ISSCC 2011
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30 results for H. Smith
When are transmission-line effects important for on-chip interconnections
- A. Deutsch
- G.V. Kopcsay
- et al.
- 1997
- ECTC 1997
Electrical modelling of temperature distributions in on-chip interconnects, packaging, and 3D integration
- Lijun Jiang
- Chuan Xu
- et al.
- 2010
- APEMC 2010
Fast 3-D thermal analysis of complex interconnect structures using electrical modeling and simulation methodologies
- Chuan Xu
- Lijun Jiang
- et al.
- 2009
- ICCAD 2009
Thermal modeling of on-chip interconnects and 3D packaging using EM tools
- Lijun Jiang
- Seshadri Kolluri
- et al.
- 2008
- EPEPS 2008
Effect of noise on timing or data-pattern dependent delay variation when transmission-line effects are taken into account for on-chip wiring
- A. Deutsch
- H. Smith
- et al.
- 2007
- IEEE-SPI 2007
Parallelization of the reduced-coupling technique for a method-of-moments-based field solver used for product-level wide data-bus analysis
- A.J. Hesford
- J.D. Morsey
- et al.
- 2007
- IEEE Topical Meeting EPEPS 2007
The effect of power islands on delta-I noise, interconnect noise, and timing for wide, on-chip data-buses
- A. Deutsch
- H. Smith
- et al.
- 2005
- IEEE Topical Meeting EPEPS 2005
A CAD methodology and tool for the characterization of wide on-chip buses
- I.M. Elfadel
- A. Deutsch
- et al.
- 2004
- DATE 2004
Methodology to simulate delta-I noise interaction with interconnect noise for wide, on-chip data-buses using lossy transmission-line power-blocks
- A. Deutsch
- H. Smith
- et al.
- 2004
- IEEE Topical Meeting EPEPS 2004