IBM POWER9 circuit design and energy optimization for 14-nm technology
- Eric J. Fluhr
- R.M. Rao
- et al.
- 2018
- IBM J. Res. Dev
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30 results for H. Smith
IBM z13 circuit design and methodology
- J. Warnock
- Christopher Berry
- et al.
- 2015
- IBM J. Res. Dev
Circuit and physical design of the zenterprise™ ec12 microprocessor chips and multi-chip module
- James Warnock
- Yuen Chan
- et al.
- 2014
- IEEE Journal of Solid-State Circuits
A 5.2GHz microprocessor chip for the IBM zEnterprise™ system
- James Warnock
- Y.-H. Chan
- et al.
- 2011
- ISSCC 2011
A thermal simulation process based on electrical modeling for complex interconnect, packaging, and 3DI structures
- Lijun Jiang
- Chuan Xu
- et al.
- 2010
- IEEE Transactions on Advanced Packaging
Electrical modelling of temperature distributions in on-chip interconnects, packaging, and 3D integration
- Lijun Jiang
- Chuan Xu
- et al.
- 2010
- APEMC 2010
Fast 3-D thermal analysis of complex interconnect structures using electrical modeling and simulation methodologies
- Chuan Xu
- Lijun Jiang
- et al.
- 2009
- ICCAD 2009
Thermal modeling of on-chip interconnects and 3D packaging using EM tools
- Lijun Jiang
- Seshadri Kolluri
- et al.
- 2008
- EPEPS 2008
Parallelization of the reduced-coupling technique for a method-of-moments-based field solver used for product-level wide data-bus analysis
- A.J. Hesford
- J.D. Morsey
- et al.
- 2007
- IEEE Topical Meeting EPEPS 2007
Effect of noise on timing or data-pattern dependent delay variation when transmission-line effects are taken into account for on-chip wiring
- A. Deutsch
- H. Smith
- et al.
- 2007
- IEEE-SPI 2007