A 4R2W register file for a 2.3GHz wire-speed POWER™ processor with double-pumped write operation
- Gary S. Ditlow
- Robert K. Montoye
- et al.
- 2011
- ISSCC 2011
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34 results for Robert Montoye
A fully-integrated switched-capacitor 2:1 Voltage converter with regulation capability and 90% efficiency at 2.3A/mm2
- Leland Chang
- Robert K. Montoye
- et al.
- 2010
- VLSI Circuits 2010
Performance and power evaluation of an in-line accelerator
- Alejandro Rico
- Jeff H. Derby
- et al.
- 2010
- CF 2010
Practical strategies for power-efficient computing technologies
- Leland Chang
- David J. Frank
- et al.
- 2010
- Proceedings of the IEEE
A 270ps 20mW 108-bit end-around carry adder for multiply-add fused floating point unit
- Xiao Yan Zhang
- Yiu-Hing Chan
- et al.
- 2009
- Journal of Signal Processing Systems
An 8T-SRAM for variability tolerance and low-voltage operation in high-performance caches
- Leland Chang
- Robert K. Montoye
- et al.
- 2008
- IEEE Journal of Solid-State Circuits
A 5.3GHz 8T-SRAM with operation down to 0.41V in 65nm CMOS
- Leland Chang
- Yutaka Nakamura
- et al.
- 2007
- VLSI Circuits 2007
VICTORIA - VMX indirect compute technology oriented towards in-line acceleration
- Jeff H. Derby
- Robert K. Montoye
- et al.
- 2006
- CF 2006
Design of shifting and permutation units using LSDL circuit family
- Ramyanshu Datta
- Robert Montoye
- et al.
- 2006
- ACSSC 2006
Wide limited switch dynamic logic circuit implementations
- Jayakumaran Sivagnaname
- Hung C. Ngo
- et al.
- 2006
- VLSID/Embedded 2006