A 28-Gb/s 4-Tap FFE/15-Tap DFE Serial Link Transceiver in 32-nm SOI CMOS Technology
- John F. Bulzacchelli
- Christian Menolfi
- et al.
- 2012
- IEEE JSSC
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38 results for Troy Beukema
A 16-Gb/s backplane transceiver with 12-tap current integrating DFE and dynamic adaptation of voltage offset and timing driftsin 45-nm SOI CMOS technology
- Gautam R. Gangasani
- Chun-Ming Hsu
- et al.
- 2012
- IEEE JSSC
A 28.05Gb/s transceiver using quarter-rate triple-speculation hybrid-DFE receiver with calibrated sampling phases in 32nm CMOS
- Gautam Gangasani
- John F. Bulzacchelli
- et al.
- 2017
- VLSI Circuits 2017
A 3.5pJ/bit 8-tap-feed-forward 8-tap-decision feedback digital equalizer for 16Gb/s I/Os
- Thomas Toifl
- Peter Buchmann
- et al.
- 2014
- ESSCIRC 2014
A 32-Gb/s backplane transceiver with on-chip AC-coupling and low latency CDR in 32-nm SOI CMOS technology
- Gautam R. Gangasani
- John F. Bulzacchelli
- et al.
- 2013
- A-SSCC 2013
A 3.2GS/s 4.55b ENOB two-step subranging ADC in 45nm SOI CMOS
- Jean-Olivier Plouchart
- Mihai Sanduleanu
- et al.
- 2012
- CICC 2012
A 16-Gb/s backplane transceiver with 12-tap current integrating DFE and dynamic adaptation of voltage offset and timing drifts in 45-nm SOI CMOS technology
- Gautam R. Gangasani
- Chun-Ming Hsu
- et al.
- 2011
- CICC 2011
Multi-level signaling in high-density, high-speed electrical links
- Dong G. Kam
- Troy J. Beukema
- et al.
- 2008
- DesignCon 2008
Second generation 60-GHz transceiver chipset supporting multiple modulations at Gb/s data rates (Invited)
- Scott Reynolds
- Alberto Valdes-Garcia
- et al.
- 2007
- BCTM 2007
Multi-Mode Modulator and Frequency Demodulator Circuits for Gb/s Data Rate 60 GHz Wireless Transceivers
- Alberto Valdes-Garcia
- Scott Reynolds
- et al.
- 2007
- CICC 2007