Timothy O. Dickson, Yong Liu, et al.
IEEE JSSC
This paper presents a 16-Gb/s 45-nm SOI CMOS transceiver for multi-standard backplane applications. The receiver uses a 12-tap DFE with circuit refinements for supporting higher data rates. Both the receiver and the transmitter use dynamic adaptation to combat parameter drift due to changing supply voltage and temperature. A 3-tap FFE is included in the source-series-terminated driver. The combination of DFE and FFE permits error-free NRZ signaling at 16 Gb/s over channels exceeding 30 dB loss. The 8-port core with two PLLs is fully characterized for 16GFC and consumes 385 m W/link. © 2012 IEEE.
Timothy O. Dickson, Yong Liu, et al.
IEEE JSSC
Bodhisatwa Sadhu, John F. Bulzacchelli, et al.
RFIC 2016
Timothy O. Dickson, Yong Liu, et al.
CICC 2014
John F. Bulzacchelli, Hae-Seung Lee, et al.
Physica C: Superconductivity and its Applications