A unified methodology for pre-silicon verification and post-silicon validation
- Allon Adir
- Shady Copty
- et al.
- 2011
- DATE 2011
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21 results for Allon Adir
Addressing test generation challenges for configurable processor verification
- M. Rimon
- Yossi Lichtenstein
- et al.
- 2006
- HLDVT 2006
Extending the model-based approach to functional verification of address translation mechanisms
- Allon Adir
- Laurent Fournier
- et al.
- 2006
- HLDVT 2006
Piparazzi: A test program generator for micro-architecture flow verification
- A. Adir
- E. Bin
- et al.
- 2003
- HLDVT 2003
DeepTrans - A model-based approach to functional verification of address translation mechanisms
- A. Adir
- R. Emek
- et al.
- 2003
- MTV 2003
Adaptive test program generation: Planning for the unplanned
- A. Adir
- R. Emek
- et al.
- 2002
- HLDVT 2002
Generating concurrent test-programs with collisions for multi-processor verification
- A. Adir
- Gil Shurek
- 2002
- HLDVT 2002
Improving test quality through resource reallocation
- A. Adir
- E. Marcus
- et al.
- 2001
- HLDVT 2001
Concurrent generation of concurrent programs for post-silicon validation
- Allon Adir
- Amir Nahir
- et al.
- 2012
- IEEE TCADIS
Genesys-Pro: Innovations in test program generation for functional processor verification
- Allon Adir
- Eli Almog
- et al.
- 2004
- IEEE Design and Test of Computers