1.5-V single work-function W/WN/n+-poly gate CMOS device design with 110-nm buried-channel PMOS for 90-nm vertical-cell DRAM
- Rajesh Rengarajan
- Boyong He
- et al.
- 2002
- IEEE Electron Device Letters
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When is bilayer thin-film imaging suitable: Comparison with single layer resists
- Scott Halle
- Alan Thomas
- et al.
- 2001
- Proceedings of SPIE - The International Society for Optical Engineering