Towards electrical testable soi devices using directed self-assembly for fin formation
- Chi Chun Liu
- Cristina Estrada-Raygoza
- et al.
- 2014
- SPIE Advanced Lithography 2014
Publications
Date
Featured collections
Popular topics
57 results for Matthew Colburn
10nm FINFET technology for low power and high performance applications
- D. Guo
- H. Shang
- et al.
- 2014
- ICSICT 2014
Directed self-assembly process implementation in a 300mm pilot line environment
- Chi-Chun Liu
- I. Cristina Estrada-Raygoza
- et al.
- 2013
- SPIE Advanced Lithography 2013
Development of KrF hybrid resist for a dual isolation application
- Sen Liu
- Steven Holmes
- et al.
- 2013
- SPIE Advanced Lithography 2013
56 nm pitch copper dual-damascene interconnects with triple pitch split metal and double pitch split via
- James Hsueh-Chung Chen
- Christopher Waskiewicz
- et al.
- 2012
- IITC 2012
Lens heating challenges for negative tone develop layers with freeform illumination: A comparative study of experimental vs. simulated results
- Scott Halle
- Michael Crouse
- et al.
- 2012
- SPIE Advanced Lithography 2012
Sub-25nm FinFET with advanced fin formation and short channel effect engineering
- Tenko Yamashita
- Veeraraghvan S. Basker
- et al.
- 2011
- VLSI Technology 2011
64 nm pitch Cu dual-damascene interconnects using pitch split double exposure patterning scheme
- Shyng-Tsong Chen
- Hideyuki Tomizawa
- et al.
- 2011
- IITC/MAM 2011
Optimization of pitch-split double patterning phoresist for applications at the 16nm node
- Steven J. Holmes
- Cherry Tang
- et al.
- 2011
- ASMC 2011
Spacer-defined double patterning for 20-nm and beyond logic BEOL technology
- Ryoung-Han Kim
- Chiew-Seng Koay
- et al.
- 2011
- SPIE Advanced Lithography 2011