Device and circuit design issues in SOI technology
- G. Shahidi
- A. Ajmera
- et al.
- 1999
- CICC 1999
Publications
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23 results for Werner Rausch
Scalability of SOI technology into 0.13 μm 1.2 V CMOS generation
- E. Leobandung
- M. Sherony
- et al.
- 1998
- IEDM 1998
660 MHz self-resetting 8 port, 32×64 bits register file and latch in 0.25 μm SOI technology
- R.V. Joshi
- W. Hwang
- et al.
- 1998
- IEEE International SOI Conference 1998
7.9/5.5 psec room/low temperature SOI CMOS
- F. Assaderaghi
- W. Rausch
- et al.
- 1997
- IEDM 1997
0.25 μm CMOS SOI technology and its application to 4 Mb SRAM
- D. Schepis
- F. Assaderaghi
- et al.
- 1997
- IEDM 1997
250-600 MHz 12b digital filters in 0.8-0.25μm bulk and SOI CMOS technologies
- L. Thon
- G.P. Coleman
- et al.
- 1996
- LPED 1996
250-600 MHz 12b digital filters in 0.8-0.25μm bulk and SOI CMOS technologies
- L. Thon
- G.P. Coleman
- et al.
- 1996
- LPED 1996
History dependence of non-fully depleted (NFD) digital SOI circuits
- F. Assaderaghi
- G. Shahidi
- et al.
- 1996
- VLSI Technology 1996
Modulation-doped n-type Si/SiGe with inverted interface
- K. Ismail
- J.O. Chu
- et al.
- 1994
- Applied Physics Letters
A high performance epitaxial SiGe-base ECL BiCMOS technology
- D.L. Harame
- E.F. Crabbe
- et al.
- 1992
- IEDM 1992