Design of a high performance PD SOI for the 0.18 μm technology generation
- M. Sherony
- S.-H. Lo
- et al.
- 2000
- ICM 2000
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23 results for Werner Rausch
0.22 μm CMOS-SOI technology with a Cu BEOL
- A. Ajmera
- J. Sleight
- et al.
- 1999
- VLSI Technology 1999
Electrostatic discharge protection in silicon-on-insulator technology
- S. Voldman
- D. Hui
- et al.
- 1999
- IEEE International SOI Conference 1999
Device and circuit design issues in SOI technology
- G. Shahidi
- A. Ajmera
- et al.
- 1999
- CICC 1999
660 MHz self-resetting 8 port, 32×64 bits register file and latch in 0.25 μm SOI technology
- R.V. Joshi
- W. Hwang
- et al.
- 1998
- IEEE International SOI Conference 1998
250-600 MHz 12b digital filters in 0.8-0.25μm bulk and SOI CMOS technologies
- L. Thon
- G.P. Coleman
- et al.
- 1996
- LPED 1996
250-600 MHz 12b digital filters in 0.8-0.25μm bulk and SOI CMOS technologies
- L. Thon
- G.P. Coleman
- et al.
- 1996
- LPED 1996
History dependence of non-fully depleted (NFD) digital SOI circuits
- F. Assaderaghi
- G. Shahidi
- et al.
- 1996
- VLSI Technology 1996
Impact of lateral asymmetric channel doping on 45-nm-technology N-Type SOI MOSFETs
- Hasan M. Nayfeh
- Nivo Rovedo
- et al.
- 2009
- IEEE Transactions on Electron Devices
Modulation-doped n-type Si/SiGe with inverted interface
- K. Ismail
- J.O. Chu
- et al.
- 1994
- Applied Physics Letters