A 10Gb/s 5-tap-DFE/4-tap-FFE transceiver in 90nm CMOS
- M. Meghelli
- S. Rylov
- et al.
- 2006
- ISSCC 2006
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46 results for Benjamin D. Parker
A 6.4Gb/s CMOS SerDes core with feedforward and decision-feedback equalization
- M. Sorna
- T. Beukema
- et al.
- 2005
- ISSCC 2005
A 6.4Gb/s CMOS SerDes core with feedforward and decision-feedback equalization
- M. Sorna
- T. Beukema
- et al.
- 2005
- ISSCC 2005
A 6.4-Gb/s CMOS SerDes core with feed-forward and decision-feedback equalization
- Troy Beukema
- Michael Sorna
- et al.
- 2005
- IEEE Journal of Solid-State Circuits
A Semi-Digital Delay-Locked Loop Using an Analog-Based Finite State Machine
- Woogeun Rhee
- Benjamin Parker
- et al.
- 2004
- IEEE TCAS-II
SiGe BiCMOS integrated circuits for high-speed serial communication links
- Daniel J. Friedman
- Mounir Meghelli
- et al.
- 2003
- IBM J. Res. Dev
A single-chip 12.5Gbaud transceiver for serial data communication
- D. Friedman
- M. Meghelli
- et al.
- 2001
- VLSI Circuits 2001
Single-chip 622-Mb/s SDH/SONET framer, digital cross-connect and add/drop multiplexer solution
- Peter H. Baechtold
- Michael P. Beakes
- et al.
- 2001
- IEEE Journal of Solid-State Circuits
SiGe BiCMOS 3.3-V clock and data recovery circuits for 10-Gb/s serial transmission systems
- Mounir Meghelli
- Ben Parker
- et al.
- 2000
- IEEE Journal of Solid-State Circuits
SiGe BICMOS 3.3V clock and data recovery circuits for 10Gb/s serial transmission systems
- M. Meghelli
- B. Parker
- et al.
- 2000
- ISSCC 2000