Real-Time Scalable Cortical Computing at 46 Giga-Synaptic OPS/Watt with ∼100× Speedup in Time-to-Solution and ∼100,000× Reduction in Energy-to-Solution
- Andrew S. Cassidy
- Rodrigo Alvarez-Icaza
- et al.
- 2014
- SC 2014
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13 results for Bernard Brezzo
Single-chip 4×500Mbaud CMOS transceiver
- A.X. Widmer
- K. Wrenner
- et al.
- 1996
- ISSCC 1996
A million spiking-neuron integrated circuit with a scalable communication network and interface
- Paul A. Merolla
- John V. Arthur
- et al.
- 2014
- Science
Large payload streaming database sort and projection on FPGAs
- Bharat Sukhwani
- Mathew Thoennes
- et al.
- 2013
- SBAC-PAD 2013
Database analytics acceleration using FPGAs
- Bharat Sukhwani
- Hong Min
- et al.
- 2012
- PACT 2012
A cycle-accurate, cycle-reproducible multi-FPGA system for accelerating multi-core processor simulation
- Sameh Asaad
- Ralph Bellofatto
- et al.
- 2012
- FPGA 2012
A 45nm CMOS neuromorphic chip with a scalable architecture for learning in networks of spiking neurons
- Jae-Sun Seo
- Bernard Brezzo
- et al.
- 2011
- CICC 2011
High-throughput, lossless data compression on FPGAs
- Bharat Sukhwani
- Bulent Abali
- et al.
- 2011
- FCCM 2011
TrueNorth: Design and Tool Flow of a 65 mW 1 Million Neuron Programmable Neurosynaptic Chip
- Filipp Akopyan
- Jun Sawada
- et al.
- 2015
- IEEE TCADIS
A Hardware/Software Approach for Database Query Acceleration with FPGAs
- Bharat Sukhwani
- Mathew Thoennes
- et al.
- 2014
- Int. J. Parallel Program