A 1.3 GSample/s 10-tap full-rate variable latency self-timed FIR filter with clocked interfaces
- Jose Tierno
- Alexander Rylyakov
- et al.
- 2002
- ISSCC 2002
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8 results for Steven M. Nowick
A 1.3 Gsample/s 10-tap full-rate variable-latency self-timed FIR filter with clocked interfaces
- Jose Tierno
- Alexander Rylyakov
- et al.
- 2002
- ISSCC 2002
Synthesis of hazard-free customized CMOS complex-gate networks under multiple-input changes
- Prabhakar Kudva
- Ganesh Gopalakrishnan
- et al.
- 1996
- DAC 1996
A flexible, event-driven digital filter with frequency response independent of input sample rate
- Christos Vezyrtzis
- Weiwei Jiang
- et al.
- 2014
- IEEE JSSC
An adaptively-pipelined mixed synchronous-asynchronous digital FIR filter chip operating at 1.3 GigaHertz
- Montek Singh
- Jose A. Tierno
- et al.
- 2002
- ASYNC 2002
Improving the Energy Efficiency of Pipelined Delay Lines Through Adaptive Granularity
- Christos Vezyrtzis
- Yannis Tsividis
- et al.
- 2015
- IEEE Transactions on VLSI Systems
An adaptively pipelined mixed synchronous-asynchronous digital FIR filter chip operating at 1.3 gigahertz
- Montek Singh
- Jose A. Tierno
- et al.
- 2010
- IEEE Transactions on VLSI Systems
A 1.3 Gsample/s 10-tap full-rate variable-latency self-timed FIR filter with clocked interfaces
- Jose Tierno
- Alexander Rylyakov
- et al.
- 2002
- Digest of Technical Papers - IEEE International Solid-State Circuits Conference