Scaling planar silicon devices
- Ching-Te Chuang
- Kerry Bernstein
- et al.
- 2004
- IEEE Circuits and Devices Magazine
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79 results for Keunwoo Kim
Analysis and modeling methodology of strained-Si channel-on-insulator (SSOI) MOSFETs
- Keunwoo Kim
- Ching-Te Chuang
- et al.
- 2003
- VLSI-TSA 2003
A New Dynamic Beta-Ratio Circuit Technique for Strained-Si Technology
- Rajiv V. Joshi
- Keunwoo Kim
- et al.
- 2003
- IEEE International SOI Conference 2003
Physical compact model for threshold voltage in short-channel double-gate devices
- Keunwoo Kim
- J.G. Fossum
- et al.
- 2003
- SISPAD 2003
Strained-Si devices and circuits for low-power applications
- Keunwoo Kim
- R.V. Joshi
- et al.
- 2003
- ISLPED 2003
Strained-Si Devices and Circuits for Low-Power Applications
- Keunwoo Kim
- Rajiv V. Joshi
- et al.
- 2003
- ISLPED 2003
Achieving the ballistic-limit current in Si MOSFETs
- Keunwoo Kim
- Jerry G. Fossum
- 2003
- Solid-State Electronics
Design considerations of scaled sub-0.1 μm PD/SOI CMOS circuits
- C.T. Chuang
- R.V. Joshi
- et al.
- 2003
- ISQED 2003
Performance assessment of scaled strained-Si channel-on-insulator (SSOI) CMOS
- Keunwoo Kim
- Ching-Te Chuang
- et al.
- 2002
- IEEE International SOI Conference 2002