Publications

11 results for Seong-Dong Kim

Performance trade-offs in FinFET and gate-all-around device architectures for 7nm-node and beyond
- - Seong-Dong Kim
  - Michael Guillorn
  - et al.
- 2015
- S3S 2015
Si nanowire CMOS fabricated with minimal deviation from RMG FinFET technology showing record performance
- - Isaac Lauer
  - Nicolas Loubet
  - et al.
- 2015
- VLSI Technology 2015
Exploring MOL design options for a 20nm CMOS technology using TCAD
- - Andreas Scholze
  - Stephen Furkay
  - et al.
- 2011
- SISPAD 2011
Modeling gate-pitch scaling impact on stress-induced mobility and external resistance for 20nm-node MOSFETs
- - Seong-Dong Kim
  - Sameer Jain
  - et al.
- 2010
- SISPAD 2010
Optimum location of silicide/Si interface in ultra-thin body SOI MOSFETs with recessed and elevated silicide source/drain contact structure
- - Seong-Dong Kim
- 2009
- Solid-State Electronics
A new method to determine effective lateral doping abruptness and spreading-resistance components in nanoscale MOSFETs
- - Seong-Dong Kim
  - Shreesh Narasimha
  - et al.
- 2008
- IEEE Transactions on Electron Devices
(110) Channel, SiON gate-dielectric PMOS with record high I_on=1 mA/μm through channel stress and source drain external resistance (R _ext) engineering
- - B. Yang
  - A. Waite
  - et al.
- 2007
- IEDM 2007
CMOS fabricated by hybrid-orientation technology (HOT)
- - Bin Yang
  - M. Yang
  - et al.
- 2007
- IEDST 2007
Optimization of DUV lithography for high-energy well implantation
- - Ryan Deschner
  - Seong-Dong Kim
  - et al.
- 2007
- SPIE Advanced Lithography 2007
Novel enhanced stressor with graded embedded SiGe source/drain for high performance CMOS devices
- - J.-P. Han
  - H. Utomo
  - et al.
- 2006
- IEDM 2006