High Performance Nanosheet Technology Optimized for 77 K
- R. Bao
- L. Qin
- et al.
- 2023
- IEDM 2023
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29 results for A. Bryant
High performance 14nm SOI FinFET CMOS technology with 0.0174μm2 embedded DRAM and 15 levels of Cu metallization
- C.-H.C-H. Lin
- Brian Greene
- et al.
- 2014
- IEDM 2014
Comprehensive study of effective current variability and MOSFET parameter correlations in 14nm multi-fin SOI FINFETs
- Abhijeet Paul
- Andres Bryant
- et al.
- 2013
- IEDM 2013
Trigate 6T SRAM scaling to 0.06 μm2
- M. Guillorn
- J. Chang
- et al.
- 2009
- IEDM 2009
Performance comparison and channel length scaling of strained Si FETs on SiGe-on-insulator (SGOI)
- J. Cai
- K. Rim
- et al.
- 2004
- IEDM 2004
GIDL in doped and undoped FinFET devices for low-leakage applications
- Pranita Kerber
- Qintao Zhang
- et al.
- 2013
- IEEE Electron Device Letters
Gate-dielectric permitivity and metal-gate work-function tradeoff in Lmet = 25 nm PDSOI device characteristics
- Dechao Guo
- Andres Bryant
- et al.
- 2006
- IEEE Electron Device Letters
A novel ALD SiBCN low-k spacer for parasitic capacitance reduction in FinFETs
- Tenko Yamashita
- S. Mehta
- et al.
- 2015
- VLSI Technology 2015
Fin width scaling for improved short channel control and performance in aggressively scaled channel length SOI finFETs
- Abhijeet Paul
- Chun-Chen Yeh
- et al.
- 2013
- S3S 2013
Channel doping impact on FinFETs for 22nm and beyond
- Chung-Hsun Lin
- R. Kambhampati
- et al.
- 2012
- VLSI Technology 2012