High performance 32nm SOI CMOS with high-k/metal gate and 0.149μm 2 SRAM and ultra low-k back end with eleven levels of copper
- B. Greene
- Q. Liang
- et al.
- 2009
- VLSI Technology 2009
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23 results for D.-G. Park
Copper contact metallization for 22 nm and beyond
- Soon-Cheon Seo
- Chih-Chao Yang
- et al.
- 2009
- IITC 2009
Recent progress and challenges in enabling embedded Si:C technology
- B. Yang
- Z. Ren
- et al.
- 2008
- ECS Meeting 2008
On implementation of embedded Phosphorus-doped SiC stressors in SOI nMOSFETs
- Zhibin Ren
- G. Pei
- et al.
- 2008
- VLSI Technology 2008
Higher hole mobility induced by twisted Direct Silicon Bonding (DSB)
- M. Hamaguchi
- H. Yin
- et al.
- 2008
- VLSI Technology 2008
Effect of end-of-range defects on device leakage in direct silicon bonded (DSB) technology
- Haizhou Yin
- M. Hamaguchi
- et al.
- 2008
- VLSI-TSA 2008
Scalability of Direct Silicon Bonded (DSB) technology for 32nm node and beyond
- Haizhou Yin
- C.Y. Sung
- et al.
- 2007
- VLSI Technology 2007
High-performance high-κ/metal gates for 45nm CMOS and beyond with gate-first processing
- M. Chudzik
- B. Doris
- et al.
- 2007
- VLSI Technology 2007
High performance transistors featured in an aggressively scaled 45nm bulk CMOS technology
- Z. Luo
- N. Rovedo
- et al.
- 2007
- VLSI Technology 2007
Ultra-thin SOI replacement gate CMOS with ALD TaN / high-k gate stack
- B. Doris
- B.P. Linder
- et al.
- 2005
- VLSI-TSA 2005