Recent advances in dielectric breakdown of modern gate dielectrics
- Ernest Y. Wu
- Jordi Sune
- 2013
- IIRW 2013
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59 results for Ernest Y. Wu
Improving and optimizing reliability in future technologies with high-κ dielectrics
- Barry P. Linder
- Eduard Cartier
- et al.
- 2013
- VLSI-DAT 2013
Improving and optimizing reliability in future technologies with high-κ dielectrics
- Barry P. Linder
- Eduard Cartier
- et al.
- 2013
- VLSI-TSA 2013
A new formulation of breakdown model for high-κ/SiO2 stack dielectrics
- Ernest Y. Wu
- 2013
- IRPS 2013
Generalized successive failure methodology for non-Weibull distributions and its applications to SiO 2 or high-k/SiO 2 bilayer dielectrics and extrinsic failure mode
- Ernest Wu
- Jordi Suñé
- et al.
- 2012
- IRPS 2012
Min-log approach to modeling dielectric breakdown data
- Emmanuel Yashchin
- Baozhen Li
- et al.
- 2012
- IRPS 2012
Post-breakdown statistics and acceleration characteristics in high-K dielectric stacks
- Ernest Wu
- Jordi Sune
- et al.
- 2011
- IRPS 2011
Towards a viable TDDB reliability assessment methodology: From breakdown physics to circuit failure
- Ernest Y. Wu
- Jordi Suné
- 2009
- IPFA 2009
High performance 32nm SOI CMOS with high-k/metal gate and 0.149μm 2 SRAM and ultra low-k back end with eleven levels of copper
- B. Greene
- Q. Liang
- et al.
- 2009
- VLSI Technology 2009
Electrostatic discharge induced oxide breakdown characterization in a 0.1 μm CMOS technology
- A. Salman
- R. Gauthier
- et al.
- 2002
- IRPS 2002